Prof. Dr. Marc Stöttinger

Prof. Dr. Marc Stöttinger | Professor für Technische Informatik und Security

Allgemein:

Raumnummer: UdE, Haus C, Raum C211
E-Mail: Marc.Stoettinger(at)remove-this.hs-rm.de
Telefon: +4961194951214

Postanschrift:

Postfach 3251
65022 Wiesbaden

Besuchsadresse:

Unter den Eichen 5
65195 Wiesbaden

Sprechzeiten:

nach Vereinbarung

  • Seit 01/2022: Professur an der Hochschule RheinMain im Fachbereich DCSM, Deutschland
  • 11/2020 bis 12/2021: Senior IT-Analysis im Hessischen Ministerium des Inneren und für Sport Abteilung VII 12 - Hessen Cyber Compentence Center, Deutschland
  • 09/2014 bis 10/2020: Senior Expert Automotive Embedded Hardware Cyber Security bei Continental AG im Securtiy & Privacy Competence Center, Deutschland
  • 09/2012 bis 08/2014: Stellvertretender Forschungrguppenleiter bei Temasek Laboratories @ Nanyang Technological University im PACE Lab, Singapur
  • 09/2008 bis 09/2012: Wissenschaftlicher Mitarbeiter, Technische Universität Darmstadt im Fachbereich informatik, Deutschland
  • 09/2008 bis 09/2012: Assoziierter Forscher, Center for Advance Security Research Darmstadt, Deutschland
  • 2002 bis 2008: Studium Elektro- und Informationstechnik and der Technischen Universität Darmstadt, Deutschland

Wintersemester 2023

  • Hardwarenahe Programmierung 1
  • Embedded Systems
  • Current Topics in Computer Science - AI in Security 

Sommersemester 2022

  • Hardwarenahe Programmierung 2
  • Microprozessortechnik
  • Embedded IT-Security

Offene Themen

  • Bachelorarbeit:  Umsetzen des UAF-Protokolls von FIDO-Devices mit Postquanten Kryptographie
  • Bachelorarbeit: Entwurf und Realisierung eines Remote Seitenkanalmessplatzes
  • ...

Aktuelle betreuende Arbeiten

  • Masterarbeit: Praktische Differentielle Fehleranalyse in der IT Forensik - Referent

Abgeschlossene Arbeiten

  • Masterarbeit: Hardware Accelerator of Lattice-based Post-Quantum Cryptography  - Koreferent
  • Embedded System Security:
    • Implementierungsangriffe (Seitenkanalanalyse und Fehlerangriffe)
    • Sicheres Design von kryptographischen Algorithmen in HW/SW
    • Sicherheitsarchitektur auf Systemebene
  • Crypto Agilität:
    • Post-Quanten Kryptographie mit beschränkten Resourcen
    • Sichere Entwicklungs- und Transformationsprozesse
    • Operativen Security Mechanismen und Prozesse für eingebettete Systeme
  • Applikationsbereiche:
    • Automotive
    • IoT

2023

  • COSADE 2023 - Programm Committee
  • Dagstuhl-Seminar 23152 Secure and Efficient Post-Quantum Cryptography in Hardware and Software
  • escar Europe 2023 - Programm Committee

2022

  • CAST 2022 - Programm Committee
  • CARDIS 2022 - Programm Committee
  • COSADE 2022 - Programm Committee
  • escar Europe 2022 - Programm Committee
  • Lorentz Center Workshop Post-Quantum Cryptography for Embedded Systems 2022 - Program Chair
  • SPACE 2022 - Programm Committee

2021

  • CAST 2021 - Programm Committee
  • CHES 2021 - Programm Committee
  • COSADE 2021 - Programm Committee
  • escar Europe 2021 - Programm Committee
  • SPACE 2021 - Programm Committee

2020

  • CAST 2020 - Programm Committee
  • COSADE 2020 - Programm Committee
  • escar Europe 2020 - Programm Committee
  • Lorentz Center Workshop Post-Quantum Cryptography for Embedded Systems 20202 - Program Chair

2019

  • CAST 2019 - Programm Committee
  • COSADE 2019 - Programm Chair
  • Dagstuhl-Seminar 19301 Secure Composition for Hardware Systems
  • escar Europe 2019 - Programm Committee
  • Informatik 2019 - Programm Committee
     

2018

  • CAST 2018 - Programm Committee
  • COSADE 2018 - Programm Committee
  • escar Europe 2018 - Programm Committee
  • ReCoSoc 2018 - Programm Committee

2017

  • CHES 2017 - Programm Committee

2016

  • CHES 2016 - Programm Committee
  • MAL-IoT16 - Programm Committee
  • ReCoSoc 2016 - Programm Committee

2015

  • ReCoSoc 2015 - Programm Committee

2014

  • ReCoSoc 2014 - Programm Committee

2013

  • ReCoSoc 2013 - Programm Committee

2012

  • COSADE 2012 - Program Chair

2011

  • COSADE 2011 - Program Chair
  • NESEA 2011 - Programm Committee

2010

  • COSADE 2010 - Program Chair

2022

  • Fabio Campos and Michael Meyer and Krijn Reijnders and Marc Stöttinger: Patient Zero & Patient Six: Zero-Value and Correlation Attacks on CSIDH and SIKE, Will appear at sac 2022. - eprint
  • Marc-André Kaufhold, Ali Sercan Basyurt, Kaan Eyilmez, Marc Stöttinger, Christian Reuter: Cyber Threat Observatory: Design and Evaluation of an Interactive Dashboard for Computer Emergency Response Teams, ECIS 2022 - Dokument

2021

  • YiWang, Marc Stöttinger, YajunHa: A Fault Resistant AES via Input-Output Differential Tables with DPA Awareness, ISCAS 2021
  • Marc-André Kaufhold, Jennifer Fromm, Thea Riebe, Milad Mirbabaie, Philipp Kuehn, Ali Sercan Basyurt, Markus Bayer, Marc Stöttinger, Kaan Eyilmez, Reinhard Möller, Christoph Fuchß, Stefan Stieglitz, Christian Reuter: CYWARN: Strategy and Technology Development for Cross-Platform Cyber Situational Awareness and Actor-Specific Cyber Threat Communication, Workshop-Proceedings Mensch und Computer 2021 - Dokument
  • Ruben Gonzalez, Andreas Hülsing, Matthias J. Kannwischer, Juliane Krämer, Tanja Lange, Marc Stöttinger, Elisabeth Waitz, Thom Wiggers, Bo-Yin Yang: Verifying Post-Quantum Signatures in 8 kB of RAM, PQCrypto 2021 - eprint

2020

  • Julius Hermelink, Thomas Pöppelmann, Marc Stöttinger, Yi Wang, Yong Wan: Quantum Safe Authenticated Key Exchange Protocol for Automotive Application, 18th escar Europe - Dokument
  • Fabio Campos, Matthias J. Kannwischer, Michael Meyer, Hiroshi Onuki, Marc Stöttinger: Trouble at the CSIDH: Protecting CSIDH with Dummy-Operations Against Fault Injection Attacks, FDTC 2020 - eprint
  • Fabio Campos, Tim Kohlstadt, Steffen Reith, Marc Stöttinger: LMS vs XMSS: Comparison of Stateful Hash-Based Signature Schemes on ARM Cortex-M4, AFRICACRYPT 2020 - eprint
  • Wen Wang, Marc Stöttinger: Post-quantum Secure Architectures for Automotive Hardware Secure Modules - eprint
  • Bernhard Jungk, Marc Stöttinger: Serialized Lightweight SHA-3 FPGA Implementations, Elsevier Microprocessors and Microsystems, Vol. 71

2019

  • Fabio Campos, Michael Meyer, Steffen Sanwald, Marc Stöttinger, Yi Wang: Post-Quantum Cryptography for ECU Security Use Cases, 17th escar Europe - Dokument
  • Steffen Sanwald, Liron Kaneti, Marc Stöttinger, Martin Böhner: Secure Boot Revisited: Challenges for Secure Implementations in the Automotive Domain, 17th escar Europe - Dokument
  • Stefan Katzenbeisser, Ilia Polian, Francesco Regazzoni, Marc Stöttinger: Security in Autonomous Systems, ETS 2019
  • Ingo Braun, Fabio Campos, Steffen Reith, Marc Stöttinger: No RISC, no Fun: Comparison of Hardware Accelerated Hash Functions for XMSS - eprint

2018

  • Bernhard Jungk, Richard Petri, Marc Stöttinger: Efficient Side-Channel Protections of ARX Ciphers, IACR Transactions on Cryptographic Hardware and Embedded Systems, Vol. 18 - Dokument

2017

  • Gavin Xiaoxu Yao, Marc Stöttinger, Ray CC Cheung, Sorin A. Huss: Side-Channel Attacks and Their Low Overhead Countermeasures on Residue Number System Multipliers, Emerging Technology and Architecture for Big-data Analytics

2016

  • Sorin A Huss, Marc Stöttinger: A Novel Mutating Runtime Architecture for Embedding Multiple Countermeasures against Side-Channel Attacks, Hardware IP Security and Trust
  • Marc Stoettinger, Bernhard Jungk: There Ain't No Plain Key: A PUF based First-Order Side-Channel Resistant Encryption Construction, ISIC 2016 - Dokument
  • Bernhard Jungk, Marc Stöttinger: Hobbit—Smaller but faster than a dwarf: Revisiting lightweight SHA-3 FPGA implementations, ReConFig 2016
  • Ingrid Verbauwhede, Josep Balasch, Oscar Reparaz, Sorin A. Huss, Kai Rhode, Marc Stottinger, Michael Zohner: Side-Channel Attacks, 2016, CRC Press

2015

  • Wei He, Marc Stottinger, Eduardo de la Torre, Veronica Diaz: Evaluation Tools for Multivariate Side-Channel Analysis, DCIS 2015 - Dokument
  • Dirmanto Jap, Marc Stöttinger, Shivam Bhasin: Support Vector Regression: Exploiting Machine Learning Techniques for Leakage Modeling, CS2@HiPEAC 2015 - Dokument
  • Alexander Herrmann, Marc Stöttinger: Evaluation Tools for Multivariate Side-Channel Analysis, CS2@HiPEAC 2015 - Dokument

2014

  • Alexander Herrmann, Marc Stöttinger: Constructive Side-Channel Analysis for Secure Hardware Design, ISIC 2014 - Dokument
  • Marc Stöttinger, Gavin Xiaoxu Yao, Ray CC Cheung: Zero Collision Attack and its Countermeasures on Residue Number System Multipliers, ISIC 2014 - Dokument
  • Christophe Clavier, Jean-Luc Danger, Guillaume Duc, M Abdelaziz Elaabid, Benoît Gérard, Sylvain Guilley, Annelie Heuser, Michael Kasper, Yang Li, Victor Lomné, Daisuke Nakatsu, Kazuo Ohta, Kazuo Sakiyama, Laurent Sauvage, Werner Schindler, Marc Stöttinger, Nicolas Veyrat-Charvillon, Matthieu Walle, Antoine Wurcker: Practical Improvements of Side-Channel Attacks on AES: Feedback from the 2nd DPA Contest, Journal of Cryptographic Engineering, Vol. 4/2014
  • Aderinola Gbade-Alabi, David Keezer, Vincent Mooney, Axel Y Poschmann, Marc Stöttinger, Kshitij Divekar: A Signature Based Architecture for Trojan Detection, WESS 2014 - Dokument
  • Bernhard Jungk, Marc Stottinger, Matthias Harter: Shrinking KECCAK Hardware Implementations, SHA-3 Workshop 2014
  • Sebastian Kutzner, Phuong Ha Nguyen, Axel Poschmann, Marc Stöttinger: Minimizing S-Boxes in Hardware by Utilizing Linear Transformations, AFRICACRYPT 2014 

2013

  • Sebastian Kutzner, Axel Poschmann, Marc Stöttinger: TROJANUS: An Ultra-Lightweight Side-Channel Leakage Generator for FPGAs, FPT 2013 - Dokument
  • Fabrizio De Santis, Michael Kasper, Stefan Mangard, Georg Sigl, Oliver Stein, Marc Stöttinger: On the Relationship between Correlation Power Analysis and the Stochastic Approach: An ASIC Designer Perspective,  INDOCRYPT 2013
  • Sebastian Kutzner, Axel Y Poschmann, Marc Stöttinger: Hardware Trojan Design and Detection: A Practical Evaluation, WESS 2013 - Dokument
  • Bernhard Jungk, Marc Stöttinger: Among Slow Dwarfs and Fast Giants: A Systematic Design Space Exploration of KECCAK, ReCoSoC 2013 - Dokument
  • Sorin A Huss, Marc Stöttinger, Michael Zohner: Amasive: An Adaptable and Modular Autonomous Side-Channel Vulnerability Evaluation Framework, Number Theory and Cryptography
  • Marc Stöttinger: Mutating Runtime Architectures as a Countermeasure against Power Analysis Attacks, 2013, Tu Darmstadt - Dokument

2012

  • Bernhard Jungk, Marc Stöttinger, Jan Gampe, Steffen Reith, Sorin A. Huss: Sde-channel resistant AES Architecture Utilizing Randomized Composite Field Representations, FPT 2012
  • Qizhi Tian, Abdulhadi Shoufan, Marc Stoettinger, Sorin A Huss: Power Trace Alignment for Cryptosystems Featuring Random Frequency CountermeasuresICDIPC 2012 - Dokument
  • Michael Zohner, Marc Stöttinger, Sorin A Huss, Oliver Stein: An Adaptable, Modular, and Autonomous Side-Channel Vulnerability Evaluator, HOST 2012- Dokument
  • Michael Zohner, Michael Kasper, Marc Stöttinger: Butterfly-Attack on Skein’s Modular Addition, COSADE 2012
  • Michael Zohner, Michael Kasper, Marc Stöttinger: Sorin A Huss: Side Channel Analysis of the SHA-3 Finalists, DATE 2012 - Dokument
  • Annelie Heuser, Werner Schindler, Marc Stöttinger: Revealing Side-Channel Issues of Complex Circuits by Enhanced Leakage Models, DATE 2012 - Dokument
  • Annelie Heuser, Michael Kasper, Werner Schindler, Marc Stöttinger: A New Difference Method for Side-Channel Analysis with High-Dimensional Leakage Models, RSA Conference 2012 - Slides

2011

  • Marc Stottinger, Thomas Feller, Sorin A Huss: A Side-Channel Hardened IP-Protection Scheme for FPGA-based Platforms, FPT 2011 - Dokument
  • Annelie Heuser, Michael Kasper, Werner Schindler, Marc Stottinger: How a Symmetry Metric Assists Side-Channel Evaluation - A Novel Model Verification Method for Power Analysis, DSD 2011
  • H Gregor Molter, Marc Stöttinger, Abdulhadi Shoufan, Falko Strenzke: A Simple Power Analysis Attack on a McEliece Cryptoprocessor, Journal of Cryptographic Engineering, Vol. 4/2011

2010

  •  Alexander Biedermann, Marc Stöttinger, Lijing Chen, Sorin A Huss: Secure Virtualization Within a Multi-Processor Soft-Core System-On-Chip Architecture, SRC 2010 - Dokument
  • Marc Stöttinger, Sorin A Huss, Sascha Mühlbach, Andreas Koch: Side-Channel Resistance Evaluation of a Neural Network Based Lightweight Cryptography Scheme, EUC2010 - Dokument
  • Michael Kasper, Werner Schindler, Marc Stöttinger: A Stochastic Method for Security Evaluation of Cryptographic FPGA Implementations, FTP 2010
  •  Marc Stöttinger, Alexander Biedermann, Sorin Alexander Huss: Virtualization within a Parallel Array of Homogeneous Processing Units, ARC2010 - Dokument
  • Marc Stöttinger, Sunil Malipatlolla, Qizhi Tian: Survey of Methods to Improve Side-Channel Resistance on Partial Reconfigurable Platforms, 2010, Design Methodologies for Secure Embedded Systems
  • Marc Stöttinger, Felix Madlener, Sorin A Huss: Procedures for Securing ECC Implementations against Differential Power Analysis Using Reconfigurable Architectures, 2010, Dynamically Reconfigurable Systems